NVIDIA H200 (SXM) vs AMD Instinct MI355X

Agent access

1. ai-native userPoint an agent at llms.txt or agent-oriented docs

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)~partialprobed5/10

   A probe confirms developer.nvidia.com/llms.txt returns HTTP 200 with a real summary, showing NVIDIA does expose an agent-readable entry point for its developer docs, but this is a generic portal file, not specific to H200 GPU documentation, and other agent-friendly formats (docs.md, OpenAPI) return 404s. Missing for 10: H200-specific machine-readable docs, working docs.md/OpenAPI endpoints, and confirmation an agent can navigate beyond the root llms.txt.

   • [probe] “PROBE llms.txt: HTTP 200 at https://developer.nvidia.com/llms.txt # NVIDIA Developer > Comprehensive developer portal for NVIDIA accelerate…”
   • [probe] “PROBE docs-md: HTTP 404 at https://developer.nvidia.com/cuda-toolkit.md”
   • [probe] “PROBE openapi: all candidate paths 404 (https://developer.nvidia.com/openapi.json, https://developer.nvidia.com/swagger.json, https://develo…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullprobed7/10

   A live llms.txt file was confirmed at rocm.docs.amd.com/llms.txt with a 200 response, providing an agent-readable entry point into ROCm documentation, and the runtime probe confirms the docs surface is crawlable without a browser. Missing for 10: no evidence of per-page markdown/.md variants (404 on that probe), no OpenAPI/agent tool spec, and no confirmation that agent-oriented docs cover the MI355X product pages themselves rather than just ROCm software.

   • [probe] “PROBE llms.txt: HTTP 200 at https://rocm.docs.amd.com/llms.txt # ROCm documentation > Note: ROCm documentation is split across multiple pro…”
   • [probe] “PROBE runtime (recorded 2026-09-15): the ROCm documentation at rocm.docs.amd.com answered a keyless curl naming ROCm — the MI355X's entire d…”
   • [probe] “PROBE docs-md: HTTP 404 at https://rocm.docs.amd.com/en/latest/.md”
   • [probe] “PROBE openapi: all candidate paths 404 (https://rocm.docs.amd.com/openapi.json, https://rocm.docs.amd.com/swagger.json, https://rocm.docs.am…”

   proof ↗⚑ flag

2. ai-native userRun the product headlessly / in CI for automation

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X~partialclaimed6/10

   ROCm/Instinct docs show clear headless-automation building blocks — AMD Container Toolkit for Docker, GPU Operator for Kubernetes, Spur job scheduler (Slurm-compatible), and Cluster/ROCm Validation Suites for automated testing — all of which support running GPU workloads without a UI in CI/cluster pipelines. Missing for 10: no first-party CI pipeline example (e.g., GitHub Actions/GitLab runner config) or independent hands-on report confirming headless CI use in practice.

   • [claimed-docs] “GPU Operator Deploy and manage Instinct GPUs in Kubernetes clusters.”
   • [claimed-docs] “Spur AI-native job scheduler, drop-in compatible with Slurm, with GPU-first scheduling and Raft-based state.”
   • [claimed-docs] “Cluster Validation Suite Test scripts that validate AMD AI clusters end to end.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”
   • [claimed-docs] “ROCm Validation Suite System validation and hardware diagnostics.”

   proof ↗⚑ flag

3. ai-native userUse an official CLI

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X~partialclaimed5/10

   AMD ships official CLI tooling in its ecosystem — AMD SMI for GPU management and Spur, explicitly described as an 'AI-native job scheduler' with Slurm-compatible CLI — but these are infrastructure/ops CLIs rather than a CLI aimed at AI-native development or agentic workflows. Missing for 10: evidence of a CLI specifically designed for AI-agent/dev workflows (e.g., code generation, model interaction, agent orchestration) and independent hands-on confirmation of these CLIs' AI-native usability.

   • [claimed-docs] “AMD SMI Unified user-space tool to manage and monitor GPUs and drivers.”
   • [claimed-docs] “Spur AI-native job scheduler, drop-in compatible with Slurm, with GPU-first scheduling and Raft-based state.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”

   proof ↗⚑ flag

4. ai-native userDrive the product through a documented public API

   weight 3 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   The H200 is a hardware accelerator; while CUDA Toolkit and Nsight tools provide programming interfaces, there is no evidence of a documented public REST/agentic API for driving the product, and explicit probes for OpenAPI/swagger specs all returned 404s.

   • [probe] “PROBE docs-md: HTTP 404 at https://developer.nvidia.com/cuda-toolkit.md”
   • [probe] “PROBE openapi: all candidate paths 404 (https://developer.nvidia.com/openapi.json, https://developer.nvidia.com/swagger.json, https://develo…”

   proof ↗⚑ flag

   AMD Instinct MI355X~partialprobed4/10

   AMD documents extensive low-level APIs for driving the GPU (HIP runtime, ROCm libraries, AMD SMI, metrics exporter) and even exposes an llms.txt for machine consumption, but there is no unified, documented public API (e.g., OpenAPI/REST spec) that an AI-native agent could call to drive the product — probes for openapi.json/swagger.json all 404. missing for 10: a formal public API spec/SDK reference for agentic automation, evidence of programmatic/agent-driven control beyond developer-level HIP/ROCm libraries, independent confirmation of agent usage.

   • [claimed-docs] “HIP C++ Learn the HIP programming model.”
   • [claimed-docs] “AMD SMI Unified user-space tool to manage and monitor GPUs and drivers.”
   • [claimed-docs] “Device Metrics Exporter Prometheus-format GPU metrics for HPC and AI environments.”
   • [probe] “PROBE llms.txt: HTTP 200 at https://rocm.docs.amd.com/llms.txt # ROCm documentation > Note: ROCm documentation is split across multiple pro…”
   • [probe] “PROBE openapi: all candidate paths 404 (https://rocm.docs.amd.com/openapi.json, https://rocm.docs.amd.com/swagger.json, https://rocm.docs.am…”

   proof ↗⚑ flag

5. ai-native userBuild against official SDKs

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)~partialprobed5/10

   NVIDIA provides official SDKs to build against (CUDA Toolkit, Nsight developer tools, and NIM microservices bundled via NVIDIA AI Enterprise) that target the H200 hardware, and a developer portal exists with an llms.txt discovery file. However, probes show no machine-readable docs (404 on .md) and no OpenAPI/swagger spec, and there's no H200-specific agentic SDK evidence beyond generic CUDA/NIM tooling. missing for 10: agent-specific SDK examples, machine-readable API docs (docs-md returned 404), OpenAPI spec availability, independent developer corroboration of SDK usability for AI-native/agentic workflows.

   • [claimed-docs] “NVIDIA AI Enterprise includes NVIDIA NIM™, a set of easy-to-use microservices designed to speed up enterprise generative AI deployment.”
   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”
   • [claimed-docs] “NVIDIA Nsight Compute and Nsight System suite of tools designed to help developers optimize and increase performance of their applications.”
   • [probe] “PROBE llms.txt: HTTP 200 at https://developer.nvidia.com/llms.txt # NVIDIA Developer > Comprehensive developer portal for NVIDIA accelerate…”
   • [probe] “PROBE docs-md: HTTP 404 at https://developer.nvidia.com/cuda-toolkit.md”
   • [probe] “PROBE openapi: all candidate paths 404 (https://developer.nvidia.com/openapi.json, https://developer.nvidia.com/swagger.json, https://develo…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullprobed8/10

   AMD ships extensive official ROCm SDK documentation covering HIP runtime, OpenMP, math/communication libraries, container toolkit, framework integrations (vLLM, SGLang), and cluster/scheduling tools, with docs confirmed live and crawlable. This is a strong official SDK ecosystem AI-native developers can build against, though it lacks an OpenAPI/programmatic API spec and independent third-party validation of SDK quality beyond skepticism about software support. Missing for 10: machine-readable API spec (openapi probe 404s), independent hands-on developer corroboration of SDK usability.

   • [claimed-docs] “The foundational libraries, runtimes, and tools for GPU computing on AMD hardware — math and compute libraries, communication primitives, HI…”
   • [claimed-docs] “Full-stack documentation and recipes to deploy AI workloads on AMD GPUs using popular ROCm-enabled frameworks.”
   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [claimed-docs] “HIP C++ Learn the HIP programming model.”
   • [claimed-docs] “OpenMP Explore the OpenMP programming model.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”
   • [probe] “PROBE llms.txt: HTTP 200 at https://rocm.docs.amd.com/llms.txt # ROCm documentation > Note: ROCm documentation is split across multiple pro…”
   • [probe] “PROBE runtime (recorded 2026-09-15): the ROCm documentation at rocm.docs.amd.com answered a keyless curl naming ROCm — the MI355X's entire d…”

   proof ↗⚑ flag

Agentic features

1. ai-native userGet AI-generated insights and suggestions from my data inside the product

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

2. ai-native userDelegate tasks to a built-in AI assistant inside the product

   weight 3 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

3. ai-native userOperate the product with natural-language commands

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

Api quality

1. ai-native userDownload a machine-readable API spec (OpenAPI or equivalent)

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The H200 is a hardware GPU; NVIDIA's developer portal was probed for machine-readable API specs (openapi.json, swagger.json, etc.) and all returned 404, showing no discoverable OpenAPI spec is published.

   • [probe] “PROBE openapi: all candidate paths 404 (https://developer.nvidia.com/openapi.json, https://developer.nvidia.com/swagger.json, https://develo…”
   • [probe] “PROBE docs-md: HTTP 404 at https://developer.nvidia.com/cuda-toolkit.md”

   proof ↗⚑ flag

   AMD Instinct MI355X—none0/10

   The evidence pack includes a direct probe showing all standard OpenAPI/Swagger endpoints return 404 on AMD's ROCm docs site, and no other citation mentions a machine-readable API spec for MI355X's software stack or management tools.

   • [probe] “PROBE openapi: all candidate paths 404 (https://rocm.docs.amd.com/openapi.json, https://rocm.docs.amd.com/swagger.json, https://rocm.docs.am…”
   • [probe] “PROBE docs-md: HTTP 404 at https://rocm.docs.amd.com/en/latest/.md”

   proof ↗⚑ flag

Inference stack

1. ai-native userThis GPU has a documented LLM inference story — low-precision formats (FP8/FP4) and supported serving stacks (TensorRT-LLM, vLLM, ROCm, llama.cpp) for this part

   weight 3 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)~partialprobed4/10

   NVIDIA docs and runtime probes confirm H200's HBM3e specs and FP8 tensor performance figures, and community evidence shows real-world LLM inference (Llama2, Llama 405B) throughput gains, but no evidence names FP4 support or specific serving-stack integration (TensorRT-LLM, vLLM, ROCm, llama.cpp) for this part. missing for 10: explicit FP4 precision docs, named serving-stack support (TensorRT-LLM/vLLM/ROCm/llama.cpp) tied to H200.

   • [claimed-docs] “The H200 boosts inference speed by up to 2X compared to H100 GPUs when handling LLMs like Llama2.”
   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”
   • [probe] “PROBE runtime (recorded 2026-09-15): NVIDIA's H200 datacenter page answered a keyless curl and names the part — the spec table (141GB HBM3e,…”

   proof ↗⚑ flag

   AMD Instinct MI355X~partialclaimed6/10

   Docs confirm ROCm-based inference stack support for vLLM and SGLang, plus explicit MXFP6/MXFP4 low-precision datatype support and large HBM3E memory for LLM inference. However, the story also asks about TensorRT-LLM and llama.cpp support, and explicit FP8 support, none of which appear in the evidence pack. missing for 10: TensorRT-LLM support evidence, llama.cpp support evidence, explicit FP8 precision documentation, independent benchmarks validating inference throughput on these stacks.

   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [claimed-docs] “AMD Instinct™ MI355X GPUs deliver leadership AI and HPC performance enabling high density infrastructures with 288GB HBM3E memory, 8TB/s ban…”
   • [claimed-docs] “The foundational libraries, runtimes, and tools for GPU computing on AMD hardware — math and compute libraries, communication primitives, HI…”
   • [claimed-docs] “Full-stack documentation and recipes to deploy AI workloads on AMD GPUs using popular ROCm-enabled frameworks.”

   proof ↗⚑ flag

Tensor specs

1. ml engineerSize training and inference from published tensor throughput — TFLOPS or TOPS with precision and sparsity stated, not a bare marketing number

   weight 3 · round to NVIDIA H200 (SXM)
   NVIDIA H200 (SXM)~partialprobed4/10

   NVIDIA's H200 page is confirmed live and does contain a spec table with FP8 tensor figures and bandwidth/capacity numbers (per probe-rt-1), but the evidence pack itself surfaces mostly bare marketing multipliers ('2X faster than H100', '110X faster than CPU') rather than the actual precision-tagged TFLOPS/TOPS figures with sparsity conditions spelled out. Community commentary also notes the H200 reuses H100 silicon, adding skepticism to headline comparisons rather than to the raw spec numbers themselves. Missing for 10: explicit quoted TFLOPS/TOPS values per precision (FP8/FP16/INT8) with dense vs. sparse figures, and independent benchmark corroboration of those specific numbers.

   • [claimed-docs] “The H200 boosts inference speed by up to 2X compared to H100 GPUs when handling LLMs like Llama2.”
   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [probe] “PROBE runtime (recorded 2026-09-15): NVIDIA's H200 datacenter page answered a keyless curl and names the part — the spec table (141GB HBM3e,…”
   • [community] “The H200 GPU die is the same as the H100, but it's using a full set of faster 24GB memory stacks... This is an H100 141GB, not new silicon l…”

   proof ↗⚑ flag

   AMD Instinct MI355X—none0/10

   The evidence includes only bare marketing multipliers (e.g., 'Up to 2.2X AI performance') and mentions of supported datatypes (MXFP6/MXFP4) without any published absolute TFLOPS/TOPS figures broken out by precision (FP8/FP6/FP4/BF16) or with/without sparsity — exactly the kind of unqualified claim the story asks to avoid. Community sources discuss architectural comparisons qualitatively but never cite AMD's actual per-precision throughput spec table.

   • [claimed-docs] “Up to 2.2X the AI performance vs. competitive accelerators1”
   • [claimed-docs] “AMD Instinct™ MI355X GPUs deliver leadership AI and HPC performance enabling high density infrastructures with 288GB HBM3E memory, 8TB/s ban…”
   • [community] “Compared to Nvidia's B200 SMs, CDNA 4 CUs have half the per-clock throughput across many 16-bit/8-bit data types; AMD still relies on a bigg…”

   proof ↗⚑ flag

1. ai-native userPerform bulk operations across many items at once

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X~partialclaimed4/10

   The ROCm/Instinct docs point to inference frameworks (vLLM, SGLang) that natively support batched/continuous-batch inference, implying MI355X can process many requests or items in bulk, and GPU partitioning/cluster tooling suggest large-scale parallel job handling. However, there is no direct documentation of a bulk-operation API, batch job submission interface, or AI-native bulk-processing workflow specific to MI355X itself — it's inferred through third-party software rather than demonstrated first-party capability. Missing for 10: explicit bulk/batch API documentation, benchmarked throughput for batch workloads, and independent verification of batch processing at scale.

   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [claimed-docs] “Full-stack documentation and recipes to deploy AI workloads on AMD GPUs using popular ROCm-enabled frameworks.”
   • [claimed-docs] “GPU Partitioning Split compute units and memory to partition a single GPU.”

   proof ↗⚑ flag

2. ai-native userSchedule recurring jobs or workflows

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X~partialclaimed4/10

   AMD ships 'Spur', described as an AI-native, Slurm-compatible job scheduler with GPU-first scheduling for Instinct clusters, which implies workflow/job scheduling capability, but the evidence never explicitly confirms recurring/cron-style job scheduling or automation-depth features. Missing for 10: documentation on recurring/cron scheduling semantics, workflow orchestration examples, and independent/hands-on validation of Spur's scheduling capabilities.

   • [claimed-docs] “Spur AI-native job scheduler, drop-in compatible with Slurm, with GPU-first scheduling and Raft-based state.”

   proof ↗⚑ flag

Media engines

1. creatorHardware media engines and creator-app acceleration are documented — AV1/HEVC encoders, and professional or ISV-certified driver support where the vendor claims it

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

Scale out

1. ml engineerTrain and serve at datacenter scale on this part — documented high-bandwidth interconnect (NVLink, Infinity Fabric), multi-GPU systems, and rack-scale deployment

   weight 3 · round to NVIDIA H200 (SXM)
   NVIDIA H200 (SXM)~partialcommunity6/10

   Evidence confirms the SXM form factor, MIG partitioning, CUDA toolkit for datacenter deployment, and community proof of real multi-GPU serving (Llama 405B at 142 tok/s across H200 SXMs) validating datacenter-scale operation, but the pack never cites NVLink/NVSwitch bandwidth figures, Infinity Fabric, or DGX/HGX rack-scale system specs that the story explicitly asks for. missing for 10: explicit NVLink/NVSwitch bandwidth numbers, DGX/HGX rack-scale system documentation, independent rack-scale benchmark corroboration.

   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [claimed-docs] “Multi-Instance GPUs Up to 7 MIGs @18GB each”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”
   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”

   proof ↗⚑ flag

   AMD Instinct MI355X~partialcommunity5/10

   Evidence documents rack-scale deployment tooling (Kubernetes GPU Operator, Container Toolkit, Cluster Validation Suite, Spur scheduler, SR-IOV, AMD SMI) and high memory bandwidth (8TB/s HBM3E), supporting datacenter-scale operations, but no citation explicitly documents the GPU-to-GPU interconnect fabric (e.g., Infinity Fabric link topology or scale-up fabric analogous to NVLink) that the story specifically calls out. Community sources focus on compute/memory comparisons, not interconnect topology, so this axis is only partially evidenced. Missing for 10: explicit Infinity Fabric/interconnect bandwidth specs and multi-GPU topology documentation, independent multi-node training benchmarks confirming interconnect scaling.

   • [claimed-docs] “GPU Operator Deploy and manage Instinct GPUs in Kubernetes clusters.”
   • [claimed-docs] “Spur AI-native job scheduler, drop-in compatible with Slurm, with GPU-first scheduling and Raft-based state.”
   • [claimed-docs] “Cluster Validation Suite Test scripts that validate AMD AI clusters end to end.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”
   • [claimed-docs] “SR-IOV Yes”
   • [claimed-docs] “AMD Instinct™ MI355X GPUs deliver leadership AI and HPC performance enabling high density infrastructures with 288GB HBM3E memory, 8TB/s ban…”
   • [community] “MI355X's HBM3E subsystem gives it 288GB capacity at 8 TB/s vs Nvidia B200's 180GB at 7.7 TB/s, maintaining AMD's memory capacity/bandwidth l…”

   proof ↗⚑ flag

Linux support

1. developerLinux is a first-class citizen for this GPU — documented Linux driver releases and independent Linux testing of this part

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)—none0/10

   Evidence pack lacks any explicit mention of Linux driver releases, release notes, or independent Linux benchmarking/testing of the H200; CUDA toolkit blurb only vaguely references 'data centers' and 'supercomputers' without naming Linux, and community links focus on inference throughput or die comparisons, not OS-specific testing.

   ⚑ flag

   AMD Instinct MI355X~partialcommunity6/10

   ROCm's entire documented stack (HIP, container toolkit, Kubernetes GPU operator, AMD SMI, cluster validation) is Linux-native and independent hands-on benchmarking (chipsandcheese architecture deep-dive, HN wafer.ai comparisons) treats MI355X as a real, testable part. However, no evidence cites explicit Linux kernel driver release notes/versioning or independent Linux-specific driver validation reports. Missing for 10: explicit Linux driver release notes/changelog, independent third-party Linux driver-level testing (not just architecture/benchmark commentary), confirmation that cited benchmarks ran on Linux.

   • [claimed-docs] “The foundational libraries, runtimes, and tools for GPU computing on AMD hardware — math and compute libraries, communication primitives, HI…”
   • [claimed-docs] “HIP C++ Learn the HIP programming model.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”
   • [claimed-docs] “GPU Operator Deploy and manage Instinct GPUs in Kubernetes clusters.”
   • [community] “Compared to Nvidia's B200 SMs, CDNA 4 CUs have half the per-clock throughput across many 16-bit/8-bit data types; AMD still relies on a bigg…”
   • [community] “On every row the B300 beat the MI355X in a wafer.ai comparison; critics say the price comparison (MI355X at $2.5/hr) is unrealistic since no…”

   proof ↗⚑ flag

Open drivers

1. developerRun this GPU on an open driver — open-source kernel modules or upstream Linux support documented by the vendor

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   Evidence shows only proprietary CUDA toolkit and NVIDIA AI Enterprise stack; nothing about open-source kernel modules (nvidia-open) or upstream Linux driver support is documented in the pack. Missing for 10: any mention of NVIDIA's open GPU kernel modules, upstream mainline Linux driver support, or open-source driver documentation for the H200.

   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”
   • [claimed-docs] “NVIDIA Nsight Compute and Nsight System suite of tools designed to help developers optimize and increase performance of their applications.”

   proof ↗⚑ flag

   AMD Instinct MI355X—none0/10

   The evidence pack extensively documents ROCm's open-source user-space stack (libraries, runtimes, tools, monitoring, Kubernetes operator) but never mentions the amdgpu kernel driver, its open-source licensing, or upstream Linux kernel inclusion — the specific claim this story asks about is absent. Missing for 10: any vendor documentation of open-source kernel modules, upstream kernel driver support, or distro-inclusion status for the MI355X.

   ⚑ flag

4k gaming

1. gamerThis card drives high-refresh 4K gaming — vendor performance claims corroborated by independent game benchmarks

   weight 3 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

Upscaling

1. gamerAI upscaling and frame generation are supported on this card — the DLSS or FSR generation is documented for this part, with broad game support

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

Llm memory

1. ai-native userRun a 70B-class quantized LLM on this GPU — published VRAM capacity and memory bandwidth that make local or single-node inference practical

   weight 3 · round to NVIDIA H200 (SXM)
   NVIDIA H200 (SXM)✓fullprobed9/10

   NVIDIA docs confirm 141GB HBM3e at 4.8TB/s, comfortably fitting a 70B-class quantized model with large batch/context headroom, and this is corroborated by an independent runtime probe and community benchmarks showing real-world inference (e.g., Llama 405B at 142 tok/s) on H200 SXM. Missing for 10: independent hands-on benchmark specifically for a 70B-class quantized model rather than larger models.

   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”
   • [probe] “PROBE runtime (recorded 2026-09-15): NVIDIA's H200 datacenter page answered a keyless curl and names the part — the spec table (141GB HBM3e,…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullcommunity8/10

   AMD publishes 288GB HBM3E capacity and 8TB/s bandwidth for MI355X, far exceeding what's needed for 70B-class quantized inference, and documents vLLM/SGLang inference stacks for deployment; independent analysis corroborates the memory capacity/bandwidth lead over competing accelerators. Missing for 10: no direct hands-on benchmark or published throughput numbers specifically for a 70B model at a given quantization on this GPU.

   • [claimed-docs] “AMD Instinct™ MI355X GPUs deliver leadership AI and HPC performance enabling high density infrastructures with 288GB HBM3E memory, 8TB/s ban…”
   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [community] “MI355X's HBM3E subsystem gives it 288GB capacity at 8 TB/s vs Nvidia B200's 180GB at 7.7 TB/s, maintaining AMD's memory capacity/bandwidth l…”

   proof ↗⚑ flag

Memory spec

1. ml engineerMemory specs are published in full for this exact part — capacity, memory type, bus width, and bandwidth

   weight 2 · round drawn
   NVIDIA H200 (SXM)~partialprobed6/10

   NVIDIA's official H200 page publishes capacity (141GB), memory type (HBM3e), and bandwidth (4.8TB/s), and a runtime probe confirms this spec table is live and fetchable; independent commentary also confirms it's HBM3e stacks on the H100 die. However, memory bus width is never stated anywhere in the evidence pack. Missing for 10: explicit memory bus-width figure, and any independent/third-party spec-sheet corroboration beyond NVIDIA's own page.

   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [probe] “PROBE runtime (recorded 2026-09-15): NVIDIA's H200 datacenter page answered a keyless curl and names the part — the spec table (141GB HBM3e,…”
   • [community] “The H200 GPU die is the same as the H100, but it's using a full set of faster 24GB memory stacks... This is an H100 141GB, not new silicon l…”

   proof ↗⚑ flag

   AMD Instinct MI355X~partialcommunity6/10

   AMD's official product page confirms capacity (288GB), memory type (HBM3E), and bandwidth (8TB/s) for the MI355X, corroborated independently by chipsandcheese's comparison data. However, no evidence anywhere states the memory bus width. missing for 10: published bus width (bits) for the HBM3E memory subsystem.

   • [claimed-docs] “AMD Instinct™ MI355X GPUs deliver leadership AI and HPC performance enabling high density infrastructures with 288GB HBM3E memory, 8TB/s ban…”
   • [community] “MI355X's HBM3E subsystem gives it 288GB capacity at 8 TB/s vs Nvidia B200's 180GB at 7.7 TB/s, maintaining AMD's memory capacity/bandwidth l…”

   proof ↗⚑ flag

1. ai-native userRead the product's source under an open license

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The evidence pack describes ROCm documentation, libraries, and tools but never states an open-source license or provides a link to source code repositories; no license terms are mentioned anywhere in the pack.

   ⚑ flag

2. ai-native userSelf-host the core product

   weight 3 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)✓fullcommunity7/10

   The H200 is physical hardware you purchase/own and deploy in your own datacenter or colo, making self-hosting the core product inherently possible (unlike SaaS AI products), and NVIDIA's stack (CUDA toolkit, drivers, Nsight tools) supports fully on-prem deployment across data centers and workstations. missing for 10: no direct documentation of an on-prem purchase/procurement path or hands-on self-hosting case study, and no independent report confirming ease of self-managed deployment outside of cloud providers.

   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”
   • [claimed-docs] “NVIDIA Nsight Compute and Nsight System suite of tools designed to help developers optimize and increase performance of their applications.”
   • [claimed-docs] “the NVIDIA H200 is the first GPU to offer 141 gigabytes (GB) of HBM3e memory at 4.8 terabytes per second (TB/s)”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullcommunity9/10

   The MI355X is sold as on-prem hardware, and AMD provides a full deployment stack for self-hosting: ROCm runtime/libraries, GPU Operator for Kubernetes, AMD Container Toolkit for Docker, Cluster Validation Suite, Device Metrics Exporter, and the Spur scheduler, all documented for running the GPU in a customer-owned datacenter. Community commentary corroborates real-world self-hosted comparisons (e.g., wafer.ai benchmarks) confirming the hardware is deployed and operated independently by third parties. Missing for 10: independent hands-on report specifically walking through a full self-host bring-up (rather than benchmark-only) confirming ease of deployment.

   • [claimed-docs] “GPU Operator Deploy and manage Instinct GPUs in Kubernetes clusters.”
   • [claimed-docs] “AMD Container Toolkit Integrate Instinct GPUs with Docker and container runtimes.”
   • [claimed-docs] “Cluster Validation Suite Test scripts that validate AMD AI clusters end to end.”
   • [claimed-docs] “Device Metrics Exporter Prometheus-format GPU metrics for HPC and AI environments.”
   • [claimed-docs] “Spur AI-native job scheduler, drop-in compatible with Slurm, with GPU-first scheduling and Raft-based state.”
   • [community] “On every row the B300 beat the MI355X in a wafer.ai comparison; critics say the price comparison (MI355X at $2.5/hr) is unrealistic since no…”

   proof ↗⚑ flag

Efficiency

1. ml engineerSustained workloads are power-efficient on this part — documented power envelopes with independent performance-per-watt testing

   weight 2 · round to NVIDIA H200 (SXM)
   NVIDIA H200 (SXM)~partialcommunity3/10

   NVIDIA's own docs state the H200 operates 'within the same power profile as the H100' (nvidia-h200-sxm-docs-4), but this is a vendor claim only — no independent performance-per-watt benchmarks or third-party power-envelope testing are present in the evidence pack. Community notes (nvidia-h200-sxm-comm-2) even highlight that H200 shares H100 silicon, which is consistent but not an efficiency benchmark. Missing for 10: independent/hands-on power-draw measurements under sustained load, third-party perf/watt comparisons, and detailed thermal/power documentation beyond the single marketing sentence.

   • [claimed-docs] “This cutting-edge technology offers unparalleled performance, all within the same power profile as the H100.”
   • [community] “The H200 GPU die is the same as the H100, but it's using a full set of faster 24GB memory stacks... This is an H100 141GB, not new silicon l…”

   proof ↗⚑ flag

   AMD Instinct MI355X—none0/10

   The evidence pack lacks any documented TDP/power envelope specs or independent performance-per-watt benchmarking for the MI355X; community sources focus on raw throughput and memory bandwidth comparisons (chipsandcheese, wafer.ai) but never normalize for power draw. Missing for 10: official power envelope/TDP documentation, independent perf-per-watt benchmarks, sustained-workload thermal/power test data.

   • [community] “Compared to Nvidia's B200 SMs, CDNA 4 CUs have half the per-clock throughput across many 16-bit/8-bit data types; AMD still relies on a bigg…”
   • [community] “MI355X's HBM3E subsystem gives it 288GB capacity at 8 TB/s vs Nvidia B200's 180GB at 7.7 TB/s, maintaining AMD's memory capacity/bandwidth l…”
   • [community] “On every row the B300 beat the MI355X in a wafer.ai comparison; critics say the price comparison (MI355X at $2.5/hr) is unrealistic since no…”

   proof ↗⚑ flag

Psu planning

1. gamerSpec a build around published board power — TDP/TGP, connector requirements, and cooling guidance for this exact card

   weight 2 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

1. ai-native userPrevent my data from being used to train AI models

   weight 3 · round drawn
   NVIDIA H200 (SXM)—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

   AMD Instinct MI355X—none0/10

   The axis applies to this product kind (peer products hold positive or none verdicts on this story), so lack of evidence for an applicable capability is "none", never "na". (na/none harmonized at arena bring-up — see pipeline/scripts/na-harmonize.ts.)

   ⚑ flag

Compute stack

1. developerShip GPU-compute workloads on the vendor's toolchain — CUDA or ROCm/HIP documentation lists this part as a supported target

   weight 3 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)✓fullprobed8/10

   CUDA Toolkit is NVIDIA's standard GPU-compute toolchain, explicitly documented as supporting deployment across data centers and supercomputers, and H200 is the current flagship data-center GPU in this same product family/lineage; community evidence (production LLM inference deployments on H200 SXM) confirms real-world CUDA-based workloads running on this part. Missing for 10: no explicit CUDA compute-capability/architecture list page directly naming 'H200' as a supported gpu-architecture target string, and no ROCm angle (not applicable to NVIDIA anyway).

   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”
   • [claimed-docs] “NVIDIA Nsight Compute and Nsight System suite of tools designed to help developers optimize and increase performance of their applications.”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”
   • [probe] “PROBE runtime (recorded 2026-09-15): NVIDIA's H200 datacenter page answered a keyless curl and names the part — the spec table (141GB HBM3e,…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullprobed9/10

   ROCm documentation explicitly covers HIP runtime, libraries, frameworks, and inference stacks (vLLM, SGLang) targeting Instinct GPUs, and Instinct-specific docs list HIP C++, OpenMP, and other toolchain components for the MI355X line, confirming it as a supported ROCm/HIP target. missing for 10: no explicit MI355X-named code sample or compatibility matrix entry pinpointing this exact SKU rather than the Instinct family generally.

   • [claimed-docs] “The foundational libraries, runtimes, and tools for GPU computing on AMD hardware — math and compute libraries, communication primitives, HI…”
   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [claimed-docs] “HIP C++ Learn the HIP programming model.”
   • [claimed-docs] “OpenMP Explore the OpenMP programming model.”
   • [probe] “PROBE runtime (recorded 2026-09-15): the ROCm documentation at rocm.docs.amd.com answered a keyless curl naming ROCm — the MI355X's entire d…”

   proof ↗⚑ flag

Frameworks

1. ml engineerPyTorch and mainstream ML frameworks run on this GPU through officially documented builds and support matrices

   weight 2 · round to AMD Instinct MI355X
   NVIDIA H200 (SXM)~partialcommunity6/10

   NVIDIA documents CUDA Toolkit support for developing/deploying GPU-accelerated applications and community evidence (HN inference benchmark) shows PyTorch-based LLM workloads (Llama 405B) running in production on H200 SXM, implying framework compatibility via CUDA. However, there is no direct citation of an official PyTorch/TensorFlow support matrix or explicit framework-version compatibility documentation for H200 specifically. Missing for 10: explicit PyTorch/TensorFlow official support matrix naming H200, CUDA/cuDNN version compatibility table, first-party framework installation guide referencing H200.

   • [claimed-docs] “With it, you can develop, optimize, and deploy your applications on GPU-accelerated embedded systems, desktop workstations, enterprise data …”
   • [claimed-docs] “NVIDIA Nsight Compute and Nsight System suite of tools designed to help developers optimize and increase performance of their applications.”
   • [community] “Llama 405B up to 142 tok/s on Nvidia H200 SXM — launched a production grade API endpoint at $3 per million tokens, made possible by H200 SXM…”

   proof ↗⚑ flag

   AMD Instinct MI355X✓fullprobed8/10

   AMD documents ROCm-enabled framework support with specific recipes for PyTorch-adjacent ML stacks and inference frameworks (vLLM, SGLang) tied to Instinct GPUs, backed by a live, crawlable documentation surface. Missing for 10: an explicit official PyTorch build/support-matrix page or version-compatibility table directly citing PyTorch, and independent hands-on confirmation of PyTorch working smoothly on MI355X specifically (only general software-support skepticism exists in community commentary).

   • [claimed-docs] “Full-stack documentation and recipes to deploy AI workloads on AMD GPUs using popular ROCm-enabled frameworks.”
   • [claimed-docs] “Inference * [vLLM](https://rocm.docs.amd.com/projects/ai-ecosystem/en/latest/inference/vllm.html) * [SGLang](https://rocm.docs.amd.com/…”
   • [claimed-docs] “The foundational libraries, runtimes, and tools for GPU computing on AMD hardware — math and compute libraries, communication primitives, HI…”
   • [probe] “PROBE runtime (recorded 2026-09-15): the ROCm documentation at rocm.docs.amd.com answered a keyless curl naming ROCm — the MI355X's entire d…”
   • [community] “On the MI355X (288GB HBM3E) and MI325X announcement, a commenter noted AMD's pricing looks good vs Nvidia H100/B100 at around $15k, but expr…”

   proof ↗⚑ flag